DV Engineer 2 at Microsoft

Job Description:

Latest job information from Microsoft for the position of DV Engineer 2. If the DV Engineer 2 vacancy in Bengaluru matches your qualifications, please submit your latest application or CV directly through the updated Jobkos job portal.

Please note that applying for a job may not always be easy, as new candidates must meet certain qualifications and requirements set by the company. We hope the career opportunity at Microsoft for the position of DV Engineer 2 below matches your qualifications.

Overview

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft’s Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality.

We are looking for aSenior Verification Engineers to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISiE) Silicon team. The candidate must be a highly motivated self-starter who will thrive in this cutting-edge technical environment.

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond

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Qualifications

Qualifications

7 or more years of experience in design verification with a proven track record of delivering complex Accelerators or CPU’s or SoC IP’s

In depth knowledge of verification principles, testbenches, stimulus generation, and UVM or C++ based test environments.

Solid understanding of computer architecture

Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments

Scripting language such as Python or Perl

Desirable:

Hands on experience in Formal property verification

knowledge in high-speed protocols like PCIe, Ethernet

Processor based testbenches and emulation

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Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Responsibilities

The AISiE silicon team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner.

Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios.

Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools

Develop tests using UVM or C/C++

Analyse and debug test failures with designers to deliver functionally correct design.

Identify and write functional coverage for stimulus and corner cases.

Close coverage to plug verification holes and meet tape out requirements.

Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.Industry leading healthcareEducational resourcesDiscounts on products and servicesSavings and investmentsMaternity and paternity leaveGenerous time awayGiving programsOpportunities to network and connect

Job Info:

• Company: Microsoft
• Position: DV Engineer 2
• Work Location: Bengaluru
• Country: IN

How to Submit an Application:

After reading and understanding the criteria and minimum qualification requirements explained in the job information DV Engineer 2 at the office Bengaluru above, immediately complete the job application files such as a job application letter, CV, photocopy of diploma, transcript, and other supplements as explained above. Submit via the Next Page link below.

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