Senior RTL Design Engineer at Proxelera

Job Description:

Latest job information from Proxelera for the position of Senior RTL Design Engineer. If the Senior RTL Design Engineer vacancy in Bangalore matches your qualifications, please submit your latest application or CV directly through the updated Jobkos job portal.

Please note that applying for a job may not always be easy, as new candidates must meet certain qualifications and requirements set by the company. We hope the career opportunity at Proxelera for the position of Senior RTL Design Engineer below matches your qualifications.

We’re hiring an RTL Design Engineer who can own complex SoC or large subsystem blocks end-to-end. You’ll define micro-architecture from specs, develop clean SystemVerilog/Verilog RTL, and drive integration, timing, power, and area closure with PD teams. Expect deep involvement through design reviews, bug closure, and silicon bring-up.

You should bring 8+ years of hands-on ASIC RTL experience with multiple production tapeouts, strong micro-architecture skills, AMBA protocols, low-power design, and clock/reset expertise. Solid exposure to DFT, synthesis constraints, ECO flows, and cross-team collaboration is essential.

Bonus: experience with coherency, memory subsystems, DDR/PCIe, security blocks, SVA, or performance/power analysis. FPGA-only, lint/CDC-only, or management-only backgrounds won’t meet the bar.

If you want real ownership and real silicon impact, this role is worth your time.

Best,

Shahid

Job Info:

• Company: Proxelera
• Position: Senior RTL Design Engineer
• Work Location: Bangalore
• Country: IN

How to Submit an Application:

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