IP Verification Engineer at ACL Digital

Job Description:

Latest job information from ACL Digital for the position of IP Verification Engineer. If the IP Verification Engineer vacancy in Hyderabad matches your qualifications, please submit your latest application or CV directly through the updated Jobkos job portal.

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IP Verification Engineer Experience : 5-7 years Location : Hyderabad Job Description:System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip (NOC) protocol. Experience in multi-master, multi-slave AXI4 use-case configurations. Knowledge of DRAM memory controllers. Develop and execute testbenches to validate the functionality and correctness of models, as well as participate in system-level testing and debugging. Basic Job Deliverable:Setup verification environment and bring up simulations with various simulations such as VCS / Questa / Xcellium / Riviera SV/UVM Functional verification Expertise in Vivado for simulation debugs Interested,please drop your CV to janagaradha.n@acldigital.com

Job Info:

• Company: ACL Digital
• Position: IP Verification Engineer
• Work Location: Hyderabad
• Country: IN

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